YAMAHA B-2

Commentary

A stereo power amplifier using Yamaha FET.

The power FET uses 2SK76 (Nch) and 2SJ26 (Pch) developed for B-2.
This FET is one size smaller and complimentary service than the B-1 power FET2SK77. In addition to the features of FET such as high input impedance and high switching speed, the pair characteristics required for pure complimentary service FET were pursued, and the original manufacturing method and pair selection method were devised and developed. The device chip size of Pch and Nch, impurity concentration and gate mesh structure are carefully examined, and pair characteristics in a wide operating range are matched by strict control in the manufacturing process. Then, pairing is done by Yamaha's original pair selection method.

The circuit configuration is as follows : FET differential amplifier with first stage cascode bootstrap, pre-drive stage current mirror differential push-pull amplifier, drive stage pure complimentary service symmetric push-pull drive, and super pair FET pure complimentary service parallel push-pull OCL.
Since the linearity of the FET used in the B-2 is better than that of the conventional one and it can be driven with low electric power, it realizes a simple configuration of two stage amplification in which a stable NFB is applied before the driver stage.
In addition, by combining the current mirror load and using a push-pull configuration for all stages except for the first stage, distortion can be suppressed both in terms of material and circuit, resulting in improved bare characteristics. As a result, excellent characteristics can be obtained even with modest NFB.
In addition, the DC amplifier configuration eliminates the capacitor from the NFB loop.


The output stage is a pure complimentary service parallel push-pull OCL circuit using two pairs of Yamaha original super-pair FETs.
This power FET has a drain loss of 100W, good linearity in all complimentary service ranges, and good uniformity in output characteristics. Low distortion factor is obtained from small output to full power. In addition, since Yamaha FET has good linearity from small current range, B-2 operates at low idle current.
A large heat sink is used for each of Lch and Rch. A power FET is attached directly to such a heat sink to lower thermal resistance and effectively dissipate heat, ensuring a sufficient margin even at full power.

The drive stage adopts pure complimentary service symmetrical push-pull system.
In this system, the Nch and Pch FETs of the power stage are each driven by a pure complimentary service push-pull circuit. Compared with the emitter-follower drive system, the drive impedance at ON and OFF times can be equally low.
In order to lower the drive impedance of the emitter follower, it is necessary to reduce the emitter resistance of the drive transistor and to pass a large current. In the symmetric push-pull circuit, the drive impedance is sufficiently low even if the current in the drive stage is small. Therefore, the drive transistor has only a small collector loss. In B-2, a high hfe and ft of Pc ≒ 1W class is used.

The first stage consists of thermally coupled low-noise FETs with precisely matched pair characteristics to form a differential amplifier.
In general, the temperature drift of the mid-point voltage is a problem in DC amplifiers. However, in B-2, a constant current bias with temperature correction is applied to the source side using an FET with a high gm, and the common-mode signal rejection ratio (CMRR), which represents the advantage of the differential effect, is very large. Therefore, the drift of the mid-point voltage is stable within 10 mV. In addition, the influence of the minute ripple of the power supply is cancelled, and a high SN ratio is secured.

In the conventional amplifier, the distortion factor sometimes deteriorates due to the change of the signal source impedance. This is due to the small drain-to-gate leakage current of the FET at the input stage and the non-linear change of the feedback capacitance (reverse junction of the diode) due to the drain-to-gate voltage. When the signal source impedance is large, the distortion is generated at the input side.
In order to solve this problem, the B-2 is equipped with a cascode bootstrap circuit in the first stage differential amplifier so that the distortion does not worsen even if the input impedance changes so that the drain-to-gate voltage does not change due to the change of the input signal.

The pre-drive uses a differential push-pull circuit that combines a current mirror circuit for class-A operation to obtain sufficient gain at a low distortion rate.


The power supply circuit is independent on the left and right sides to eliminate adverse effects between the left and right channels.
A 18,000 μ Fx2 large-capacity electrolytic capacitor is used for each channel. Before the drive stage, a constant voltage power supply is used to prevent S/N degradation due to external noise and ripple, and to stabilize the operation of the amplifier circuit. This constant voltage power supply is equipped with a protective circuit to improve reliability.

The bias circuit of the power FET is equipped with an automatic stabilization bias circuit.
This circuit automatically compensates for changes in the bias voltage caused by fluctuations in the power supply voltage and keeps the bias voltage constant. It also uses a diode matrix to prevent the rush current that flows into the FET when the Power switch is turned on, thereby preventing damage to the FET.

PD limiter, DC limiter, and temperature rise prevention transformer are used as protection circuit.

The PD limiter is a circuit that operates when a speaker (4 Ω or less) with a lower impedance than expected at the time of design is connected or when the output terminal is short-circuited. It controls the input by detecting the current and voltage flowing through the power FET.
This circuit operates at an output of 50W or more at a load impedance of 2 Ω to protect the FET.

The DC limiter circuit is a speaker protection circuit that detects the DC component of the output voltage and turns off the relay at the output terminal.
This protection circuit also functions as muting of shock noise when the power switch is ON/OFF.

The temperature rise prevention transformer is equipped with a circuit breaker inside the transformer. It detects the temperature rise of the transformer and turns off the power. This function returns automatically when the temperature drops.


In order to ensure that the operating point of the active element is at the best point, a metal film resistor that is stable against temperature is used, and a volume with gold-plated slider is used to improve reliability.

A peak level meter is mounted on the front panel.
This meter is basically the same as the Adapter UC-1 for B-1. It is a logarithmic compression type that can display from -50dB (1 mW) to + 5 dB (300W) without range switching. The response speed is also designed to be able to observe the peak output of the power amplifier. Even a single 10 kHz sinusoidal wave can cause an indication error within -2dB.

The meter section is designed to be used independently and can be used for other purposes.
The rear panel can be switched between external and internal. The external switch can be switched between W/8 Ω and 0 dBm. The external W/8 Ω can be switched to 0 dB (100W) at an input voltage equivalent to 100W/8 Ω. You can check the output of each amplifier by connecting the output of a high-frequency or mid-frequency amplifier in a multi-amplifier configuration. When the external W/8 Ω is set to 0 dBm, the meter displays 0 dB at an input voltage of 0.775 Vrms. This meter can be used when the preamplifier does not have a meter.

Equipped with a two system speaker selector with level control.
The levels of two types of speakers can be adjusted independently on the left and right by the level volume of the front panel, allowing for comparison and trial listening at the same level.
Also, if you turn off the speaker OFF switch, you can connect the speaker after observing the input of the amplifier with the meter.

Equipped with two input terminals.

Model Rating

Type	Stereo power amplifier
Amplifier Unit
Dynamic Power	140W + 140W (8 ohm, 1 khz, 0.1% THD)
Effective power	100W + 100W (8 Ω, 20 Hz to 20 kHz, THD 0.08%) 140W + 140W (4 ohm, 20 hz to 20 khz, THD 0.08%)
Total harmonic distortion factor (20 Hz to 20 kHz, 8 Ω)	0.08% or Less (Effective Output) 0.01% or Less (at 50W Output) 0.008% or Less (at 10W Output)
Cross modulation distortion factor (70Hz:7kHz=4:1)	0.03% or Less (at 8 Ω, 50W output) 0.03% or Less (4 Ω) 0.03% or Less (16 Ω)
Frequency characteristic (8 Ω at 1W output)	DC ~ 100 kHz + 0 -1dB (DC) 10 Hz ~ 100 kHz + 0 -1dB (Normal)
Phase characteristic	+ 0 °, -30 ° or less (at 10W output, DC ~ 100 kHz)
Power bandwidth	5 Hz ~ 100 kHz -3dB (8 Ω, THD 0.5%)
Damping factor (8 Ω)	70(20Hz) 70(1kHz) 50(20kHz)
Input impedance	25k Ω
Input sensitivity	775mV
Signal-to-noise ratio (IHF-A network)	115 dB (Input 4.7k Ω short)
Residual noise	0.25mV
Input terminal	1, 2 (front changeover switch) Normal, DC (rear selection switch)
Output terminal	A, B (front changeover switch)
Peak Meter Section
Indication range	-50 to + 5 dB (0 dB = 8 Ω / 100W and 0 dB = 0 dBm)
Indication error	-20 to + 5 dB : ± 1.0 dB -20 to -40dB : ± 2.0 dB -40 to -50dB : ± 3.0 dB
Frequency characteristic	20 Hz to 20 kHz ± 1.0 dB
Response speed	100 μ s
Return speed	1sec
Instruction switching	Internal - External
Sensitivity switching	0 db = 8 Ω / 100W/100k Ω - 0dBm/43k Ω
<General>
Semiconductor used	Vertical FET : 8 units Horizontal FET : 4 units Transistor : 95 units IC : 2 Diode : 66 units
Pwer	100 VAC, 50Hz/60Hz
Rated power consumption	290W
External dimensions	Width 436x Height 151x Depth 370 mm
Weight	26kg